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Freescale Semiconductor /MKL28T7_CORE1 /XRDC /HWCFG3

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Interpret as HWCFG3

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)PIDP32 0 (0)PIDP33 0 (0)PIDP34 0 (0)PIDP35 0 (0)PIDP36 0 (0)PIDP37 0 (0)PIDP38 0 (0)PIDP39 0 (0)PIDP40 0 (0)PIDP41 0 (0)PIDP42 0 (0)PIDP43 0 (0)PIDP44 0 (0)PIDP45 0 (0)PIDP46 0 (0)PIDP47 0 (0)PIDP48 0 (0)PIDP49 0 (0)PIDP50 0 (0)PIDP51 0 (0)PIDP52 0 (0)PIDP53 0 (0)PIDP54 0 (0)PIDP55 0 (0)PIDP56 0 (0)PIDP57 0 (0)PIDP58 0 (0)PIDP59 0 (0)PIDP60 0 (0)PIDP61 0 (0)PIDP62 0 (0)PIDP63

PIDP48=0, PIDP51=0, PIDP50=0, PIDP60=0, PIDP44=0, PIDP58=0, PIDP56=0, PIDP33=0, PIDP40=0, PIDP52=0, PIDP39=0, PIDP37=0, PIDP35=0, PIDP36=0, PIDP42=0, PIDP34=0, PIDP63=0, PIDP32=0, PIDP61=0, PIDP38=0, PIDP53=0, PIDP41=0, PIDP54=0, PIDP47=0, PIDP43=0, PIDP62=0, PIDP55=0, PIDP57=0, PIDP49=0, PIDP46=0, PIDP59=0, PIDP45=0

Description

Hardware Configuration Register 3

Fields

PIDP32

Process identifier present from bus master 32

0 (0): Bus master 32 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 32 sources a process identifier register to the XRDC_MDAC logic.
PIDP33

Process identifier present from bus master 33

0 (0): Bus master 33 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 33 sources a process identifier register to the XRDC_MDAC logic.
PIDP34

Process identifier present from bus master 34

0 (0): Bus master 34 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 34 sources a process identifier register to the XRDC_MDAC logic.
PIDP35

Process identifier present from bus master 35

0 (0): Bus master 35 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 35 sources a process identifier register to the XRDC_MDAC logic.
PIDP36

Process identifier present from bus master 36

0 (0): Bus master 36 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 36 sources a process identifier register to the XRDC_MDAC logic.
PIDP37

Process identifier present from bus master 37

0 (0): Bus master 37 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 37 sources a process identifier register to the XRDC_MDAC logic.
PIDP38

Process identifier present from bus master 38

0 (0): Bus master 38 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 38 sources a process identifier register to the XRDC_MDAC logic.
PIDP39

Process identifier present from bus master 39

0 (0): Bus master 39 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 39 sources a process identifier register to the XRDC_MDAC logic.
PIDP40

Process identifier present from bus master 40

0 (0): Bus master 40 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 40 sources a process identifier register to the XRDC_MDAC logic.
PIDP41

Process identifier present from bus master 41

0 (0): Bus master 41 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 41 sources a process identifier register to the XRDC_MDAC logic.
PIDP42

Process identifier present from bus master 42

0 (0): Bus master 42 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 42 sources a process identifier register to the XRDC_MDAC logic.
PIDP43

Process identifier present from bus master 43

0 (0): Bus master 43 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 43 sources a process identifier register to the XRDC_MDAC logic.
PIDP44

Process identifier present from bus master 44

0 (0): Bus master 44 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 44 sources a process identifier register to the XRDC_MDAC logic.
PIDP45

Process identifier present from bus master 45

0 (0): Bus master 45 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 45 sources a process identifier register to the XRDC_MDAC logic.
PIDP46

Process identifier present from bus master 46

0 (0): Bus master 46 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 46 sources a process identifier register to the XRDC_MDAC logic.
PIDP47

Process identifier present from bus master 47

0 (0): Bus master 47 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 47 sources a process identifier register to the XRDC_MDAC logic.
PIDP48

Process identifier present from bus master 48

0 (0): Bus master 48 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 48 sources a process identifier register to the XRDC_MDAC logic.
PIDP49

Process identifier present from bus master 49

0 (0): Bus master 49 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 49 sources a process identifier register to the XRDC_MDAC logic.
PIDP50

Process identifier present from bus master 50

0 (0): Bus master 50 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 50 sources a process identifier register to the XRDC_MDAC logic.
PIDP51

Process identifier present from bus master 51

0 (0): Bus master 51 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 51 sources a process identifier register to the XRDC_MDAC logic.
PIDP52

Process identifier present from bus master 52

0 (0): Bus master 52 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 52 sources a process identifier register to the XRDC_MDAC logic.
PIDP53

Process identifier present from bus master 53

0 (0): Bus master 53 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 53 sources a process identifier register to the XRDC_MDAC logic.
PIDP54

Process identifier present from bus master 54

0 (0): Bus master 54 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 54 sources a process identifier register to the XRDC_MDAC logic.
PIDP55

Process identifier present from bus master 55

0 (0): Bus master 55 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 55sources a process identifier register to the XRDC_MDAC logic.
PIDP56

Process identifier present from bus master 56

0 (0): Bus master 56 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 56 sources a process identifier register to the XRDC_MDAC logic.
PIDP57

Process identifier present from bus master 57

0 (0): Bus master 57 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 57 sources a process identifier register to the XRDC_MDAC logic.
PIDP58

Process identifier present from bus master 58

0 (0): Bus master 58 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 58 sources a process identifier register to the XRDC_MDAC logic.
PIDP59

Process identifier present from bus master 59

0 (0): Bus master 59 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 59 sources a process identifier register to the XRDC_MDAC logic.
PIDP60

Process identifier present from bus master 60

0 (0): Bus master 60 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 60 sources a process identifier register to the XRDC_MDAC logic.
PIDP61

Process identifier present from bus master 61

0 (0): Bus master 61 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 61 sources a process identifier register to the XRDC_MDAC logic.
PIDP62

Process identifier present from bus master 62

0 (0): Bus master 62 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 62 sources a process identifier register to the XRDC_MDAC logic.
PIDP63

Process identifier present from bus master 63

0 (0): Bus master 63 does not source a process identifier register. The XRDC_MDAC logic provides the needed PID for processor cores.

1 (1): Bus master 63 sources a process identifier register to the XRDC_MDAC logic.

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Register License

Redistribution and use in source and binary forms, with or without modification,\nare permitted provided that the following conditions are met:\n o Redistributions of source code must retain the above copyright notice, this list\n of conditions and the following disclaimer.\n o Redistributions in binary form must reproduce the above copyright notice, this\n list of conditions and the following disclaimer in the documentation and/or\n other materials provided with the distribution.\n o Neither the name of Freescale Semiconductor, Inc. nor the names of its\n contributors may be used to endorse or promote products derived from this\n software without specific prior written permission.\n THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS “AS IS” AND\n ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR\n ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON\n ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data